Remote Architecture Job In Engineering And Architecture

SDIO SD Slave Verilog/VHDL Simulation Model

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We need a simulation model which supports the SDIO Simplified Specification ...

Initialization by I/O Aware Host
IO_SEND_OP_COND CMD5
IO_RW_DIRECT CMD52
IO_RW_EXTENDED CMD53
Embedded I/O Code Storage Area
All of the included Functions
SDIO Interrupts

The slave must check signal timing, perform Interrupts, and give simulation display status. In addition to following the SDIO Simplified Specification with regards to initialization and normal functionality.

This is for an urgent project, I am available day or night to discuss.
About the recuiter
Member since Mar 14, 2020
Ceo Legend Guru
from Nizhny Novgorod Oblast, Russia

Skills & Expertise Required

Accuracy Verification Verilog/VHDL Hardware Prototyping Xilinx Simulations

Open for hiringApply before - Sep 16, 2024

Work from Anywhere

40 hrs / week

Hourly Type

Remote Job

$30.69

Cost

Offer to work on this project closes in 77 days!
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